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ATA_SetDevConfig

The ATA_SetDevConfig function allows an application to set the configuration parameters of a specified socket. Some of the fields are not appropriate for a particular socket type. For example, setting the voltage for the internal device. Part of the device configuration includes setting up the parameters for I/O transfer mode and timing. The section Setting Data Transfer Timing includes a discussion of how to use the ATA Manager to setup the software for data transfers, including DMA data transfers.

Some of the fields in this structure are changed or are not valid for ATA Manager 4.0 and later. See the field descriptions section for additional details.

The manager function code for the ATA_SetDevConfig function is $8B.

The parameter block associated with this function is defined as follows:

typedef		struct
{
	ataPBHdr		/* ataPBHdr parameter block */
	SInt32	ConfigSetting;	/* --> 32 bits of */ /* configuration information */
	UInt8	ataPIOSpeedMode;	/* --> Default PIO mode setting*/
	UInt8	Reserved3;	/* Reserved for word alignment*/
	UInt16	pcValid;	/* --> PCMCIA unique */
	UInt16	RWMultipleCount;	/* Reserved */
	UInt16	SectorsPerCyl;	/* Reserved */
	UInt16	Heads;	/* Reserved */
	UInt16	SectorsPerTrack;	/* Reserved */
	UInt16	Reserved4[2];	/* Reserved */
/* PCMCIA unique fields are indicated with a pc prefix. These */ /* fields are not supported in ATA Manager version 4.0 or later */
	UInt8	pcAccessMode;	/* --> Access mode of socket */
	UInt8	pcVcc;	/* --> device voltage */
	UInt8	pcVpp1;	/* --> Vpp 1 voltage */
	UInt8	pcVpp2;	/* --> Vpp 2 voltage */
	UInt8	pcStatus;	/* --> Status register setting */
	UInt8	pcPin;	/* --> Pin register setting */
	UInt8	pcCopy;	/* --> Copy register setting */
	UInt8	pcConfigIndex;	/* --> Option register setting */
/* The following fields are valid for parameter block version */ /*3.0 or greater (ataPBVers 3 or greater) */
	UInt8	ataSingleDMASpeed;	/* --> Single word DMA */ /* timing class */
	UInt8	ataMultiDMASpeed;	/* --> Multiple word DMA */ /* timing class */
	UInt16	ataPIOCycleTime;	/* --> Cycle time for PIO mode */
	UInt16	ataMultiCycleTime;	/* --> Cycle time for */ /* multiword DMA mode */
	UInt16	Reserved[7];	/* Reserved*/
} ATA_SetDevConfig;

Field descriptions

ataPBHdr

See the ataPBHdr parameter block definition.

ConfigSetting

This 32-bit field controls various configuration settings. The bits have the following definitions:

Bits 0-5:  Reserved, should be 0
Bit 6:    ATAPI packet DRQ handling setting
        0 = Check for assertion of cammand packet DRQ, this is the default setting.
        1 = Check for interrupt DRQ command DRQ.
Bits 7-31: Reserved, must be 0

ataPIOSpeedMode

This field contains the PIO mode to be used for commands and PIO data transfers for parameter blocks prior to version 3. For parameter block version 3 or greater, the value is bit-significant, with the low-order bit signifying PIO Mode 0. Be sure to note the difference in bit positions between this field and the corresponding "Advanced PIO Modes" field of the ATA-2 Identify Device information.

pcValid

This 16-bit field applies to systems that support PCMCIA card services. The bits indicate which fields in the parameter block contain valid settings for PCMCIA . The following values are defined:
bit 0 = when set, the value in the pcAccessMode field is valid
bit 1 = when set, the value in the pcVcc field is valid
bit 2 = when set, the value in the pcVpp1 field is valid
bit 3 = when set, the value in the pcVpp2 field is valid
bit 4 = when set, the value in the pcStatus field is valid
bit 5 = when set, the value in the pcPin field is valid
bit 6 = when set, the value in the pcCopy field is valid
bit 7 = when set, the value in the pcConfigIndex field is valid
bits 14-8 = reserved (set to 0)
bit 15 = reserved

The pcValid field is not supported in ATA Manager 4.0 or later, because the PC Card services are now handled by other system software.

PWMultipleCount

This field is reserved for future use. To ensure future compatibility, all reserved fields should be set to 0.

SectorsPerCylinder

This field is reserved for future use. To ensure future compatibility, all reserved fields should be set to 0.

Heads

This field is reserved for future use. To ensure future compatibility, all reserved fields should be set to 0.

SectorsPerTrack

This field is reserved for future use. To ensure future compatibility, all reserved fields should be set to 0.

Reserved4[2]

This field is reserved.

pcAccessMode

This field specifies the mode of the socket. This field is valid only when bit 0 of the pcValid filed is set. The mode values are:
0 = I/O mode
1 = memory mode

The pcAccessMode field is not supported in ATA Manager 4.0 or later.

pcVcc

This field specifies the new voltage setting for Vcc in tenths of a volt. The value in this field is only valid when bit 1 of the pcValid field is set. The pcVcc field is not supported in ATA Manager 4.0 or later, because the PC Card services are now handled by other system software.

pcVpp1

This field specifies the new voltage setting for Vpp1 in tenths of a volt. The value in this field is valid only when bit 2 of the pcValid field is set. The pcVpp1 field is not supported in ATA Manager 4.0 or later, because the PC Card services are now handled by other system software.

pcVpp2

This field specifies the new voltage setting for Vpp2 in tenths of a volt. The value in this field is valid only when bit 3 of the pccValid field is set. The pcVpp2 field is not supported in ATA Manager 4.0 or later, because the PC Card services are now handled by other system software.

pcStatus

This field specifies the new card register setting for a PCMCIA device. The value in this field is valid only when bit 4 of the pccValid field is set. The pcStatus field is not supported in ATA Manager 4.0 or later, because the PC Card services are now handled by other system software.

pcPin

This field specifies the new card pin register setting for a PCMCIA device. The value in this field is valid only when bit 5 of the pccValid field is set. The pcPin field is not supported in ATA Manager 4.0 or later, because the PC Card services are now handled by other system software.

pcCopy

This field specifies the new card socket/copy register setting for a PCMCIA device. The value in this field is valid only when bit 6 of the pccValid field is set. The pcCopy field is not supported in ATA Manager 4.0 or later, because the PC Card services are now handled by other system software.

pcConfigIndex

This field specifies the new card option register setting for a PCMCIA device. The value in this field is valid only when bit 7 of the pccValid field is set. The pcConfigIndex field is not supported in ATA Manager 4.0 or later, because the PC Card services are now handled by other system software.

ataSingleDMASpeed

This bit-significant field specifies the singleword DMA mode for DMA data transfers. It corresponds to the high-order byte of word 62 of the Identify Device data described in the ATA-2 specification. If word 62 is not supported by the device, then it reflects word 52 converted to bit significance. The ATA software supports word 62 modes 0 through 2, as defined in the ATA-2 specification. If the specified timing mode is higher than the values supported by the software, then the highest possible mode is selected for transfers.
The ATA Manager selects the transfer rate that satisfies the requirements of the mode and the system DMA hardware. The rate and mode are used on subsequent DMA transfers until changed by another ATA_SetDevConfig function call. The default singleword DMA mode is mode 0. This field is valid for parameter block version 3 or greater. For additional information related to setting the I/O data transfer speed, see Setting Data Transfer Timing .

ataMultiDMASpeed

This bit-significant field specifies the multiword DMA cycle mode for DMA data transfers. It corresponds to the high-order byte of word 63 of the Identify Device data described in the ATA-2 specification. If word 63 is not supported by the device, then this value should be zero which indicates that multiword DMA should not be attempted. The ATA software supports word 63 modes 0 through 2, as defined in the ATA-2 specification. If the specified timing mode is higher than the values supported by the software, then the highest supported mode is selected for DMA transfers. This field is used in conjunction with the value set in the ataMultiCycleTime field. The ATA Manager selects the transfer rate that satisfies the requirements of the mode specified in ataMultiCycleTime field and the system DMA hardware. The rate and mode are used on subsequent DMA transfers until changed by another ATA_SetDevConfig function call. The default setting for DMA mode is singleword DMA mode 0. This field is valid for parameter block version 3 or greater.
For additional information related to setting the I/O data transfer speed, see Setting Data Transfer Timing .

ataPIOCycleTime

This word field is used in conjunction with the ataIOSpeed field of the ataPBHdr structure to specify the cycle time for command and PIO data transfers. The value in this field represents word 68 of the Identify Device information, as defined in the ATA-2 specification. If this value is not zero, the ATA Manager selects the closest approximation of the cycle time supported by the system hardware which does not exceed the value and still meets the timing requirements of the selected mode.

If this value is zero, the ATA Manager uses the minimum cycle times from the ATA-2 specification for the mode. The resulting cycle timing represents the maximum timing for PIO mode 2, because that is the highest mode supported without reporting word 68 of the Identify Device information.

ataMultiCycleTime

This word field is used in conjunction with the ataMultiDMASpeed field to specify the cycle time for multiword DMA data transfers. The value represents the same value reported in word 65 or word 66 of the Identify Device information, as specified in the ATA-2 specification. If the value specified in this field is not zero, the ATA Manager selects the closest cycle time supported by the system hardware that does not exceed the value and meets the other timing requirements of the mode specified in the ataMultiDMASpeed field.

If the value is zero, the ATA Manager uses the minimum cycle times specified in the ATA-2 specification for the selected mode. The resulting cycle timing represents the minimum timing for multiword DMA mode 0, because that is the highest mode supported without reporting word 65 or word 66 of the Identify Device information.

RESULT CODES

See Table A-1 for possible result codes returned by the ATA Manager.

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